Gen-Z Consortium releases Core Specification 1.0

Wednesday 14 February 2018 | 12:11 CET | News

The Gen-Z Consortium, an organisation developing an open standard interconnect designed to provide high-speed, low latency, memory-semantic access to data and devices, made the Gen-Z Core Specification 1.0 publicly available on its website. The Gen-Z Core Specification 1.0 enables silicon providers and IP developers to begin the development of products enabling Gen-Z technology products.

Gen-Z's memory-centric standards-based approach focuses on providing an open architecture for housing and analysing the incredible amount of information at the edge coming into the data centre. Gen-Z technology supports a wide range of new storage class memory media and acceleration devices, features new hybrid and memory-centric computing technologies, and uses a highly efficient, performance-optimised platform stack. Its memory media independence and high bandwidth coupled with low latency enables advanced workloads and technologies for secure connectivity from node level to rack scale.

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