Ceva unveils low-power DSP architecture framework

US licensor of intellectual property and DSP cores Ceva has unveiled the Ceva-XC4000, a programmable low-power DSP architecture framework supporting the communication standards for mobile, Wi-Fi, DTV, white space. The Ceva-XC4000 architecture utilises an instruction set to enable software-based baseband processing. The Ceva-XC4000 delivers a five times performance improvement over the Ceva-XC323 DSP for LTE-A processing, while consuming 50 percent less power. The Ceva-XC4000 architecture is offered in a series of six programmable DSP cores, offering modem developers a spectrum of performance capacities. The Ceva-XC4000 architecture incorporates power-oriented enhancements, including Ceva's 2G Power Scaling Unit (PSU 2.0) which supports clock and voltage scaling with fine granularity within the processor, memories, buses and system resources. The architecture also utilises Tightly Coupled Extensions (TCE) to deliver inter-connected power-optimised coprocessors and interfaces for the implementation of PHY functions. The Ceva-XC4000 incorporates enhanced system-level mechanisms, queues and interfaces to deliver performance, faster connectivity, higher bandwidth, lower latency and PHY control. The architecture offers modem quality using two distinct inter-mixable instruction sets, supporting the 4x4 and 8x8 MIMO algorithms. The Ceva-XC4000 DSP architecture is supported by Ceva-Toolbox, a complete software development environment, incorporating Vec-C compiler technology for advanced vector processors, enabling the entire architecture to be programmed in C-level. An integrated simulator provides accurate verification of the entire system including the memory sub-systems. Ceva-Toolbox includes libraries, a graphical debugger, and a complete optimisation tool chain named Ceva Application Optimizer. The Application Optimizer enables automatic and manual optimisation applied in the C source code. The first member of the Ceva-XC4000 DSP series is available for lead customers.